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J-Link Unlimited Flash Breakpoints Now Free for Evaluation
This feature has been optimized over years and is used by thousands of developers. Its clear advantages can now be experienced when using any J-Link, J-Link Ultra or J-Trace model without the need to request a license key by simply downloading the latest version of the J-Link related Software and Documentation Pack from www.segger.com/jlink-software.html.
If used in a commercial project, a license needs to be purchased when the evaluation is complete. There is no time limit on the evaluation period.
Behind the Technology
SEGGER Flash Breakpoints have been optimized to such a high level, the user will not even realize he has run out of hardware breakpoints during his debug session. J-Link reprograms the flash memory as little as possible. A number of optimizations are used, such as usage of hardware breakpoints whenever possible, automatic conversion of breakpoint types where applicable, instruction set simulation and emulation, flash cache, and other methods SEGGER has developed over the many years of this features evolution.
An unlimited number of breakpoints can be set anywhere in program memory; including the target device's, internal flash memory, external CFI-compliant flash, and internal or external RAM. Debugging limitations imposed by the number of hardware breakpoints available (2 on ARM7/9, 4 on Cortex-M0, M1 and typically 6 on Cortex-M3, M4) are completely eliminated.
This presents a flash debugging environment which is virtually the same as that when debugging in RAM.
“Unlimited Flash Breakpoints significantly improves the debugging experience for anybody developing code located in Flash memory. I personally use it all the time and see it as a must-have for every professional developer” says Rolf Segger, founder and CTO of SEGGER.
About J-Link
The SEGGER J-Link is the most popular debug probe on the market. It is tool chain independent and works with free GDB-based tool chains such as emIDE and Eclipse, as well as commercial IDEs from: Microchip (MPLAB® X), Atmel, Atollic, Coocox, Cosmic, Freescale, IAR, KEIL, Mentor Graphics, Python, Rowley, Renesas, Tasking and others. With the J-Link family, investments in the debug probe are preserved when changing compiler or even CPU architecture.
J-Link supports multiple CPU families, such as ARM 7, 9, 11, Cortex-M0, M0+, M1, M3, M4, R4, A5, A8, A9 as well as Renesas RX100, RX200, RX610, 620, 62N, 62T, 630, 631, 63N and Microchip PIC32; there is no need to buy a new J-Link or new license when switching to a different yet supported CPU family or tool-chain. SEGGER is also continuously adding support for additional cores, which in most cases, only requires a software/firmware update. Unlimited free updates are included with even the baseline model of the J-Link family. SEGGER is excited to continue advanced development of its cutting edge embedded tool solutions to be utilized with pretty much any development environment you choose. All J-Links are fully compatible to each other, so an upgrade from a lower-end model to a higher-end model is a matter of a simple plug-and-play.
Full product specifications are available at: www.segger.com/jlink.html The J-Link-Software is available at: www.segger.com/download_jlink.html U.S. On-Line Web Shop: http://shop-us.segger.com Online Shop (Europe, Asia, Africa): http://shop.segger.com